mdp5_cfg          352 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 0: return (mdp5_cfg->ctl.base[0]);
mdp5_cfg          353 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 1: return (mdp5_cfg->ctl.base[1]);
mdp5_cfg          354 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 2: return (mdp5_cfg->ctl.base[2]);
mdp5_cfg          355 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 3: return (mdp5_cfg->ctl.base[3]);
mdp5_cfg          356 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 4: return (mdp5_cfg->ctl.base[4]);
mdp5_cfg          539 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_VIG0: return (mdp5_cfg->pipe_vig.base[0]);
mdp5_cfg          540 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_VIG1: return (mdp5_cfg->pipe_vig.base[1]);
mdp5_cfg          541 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_VIG2: return (mdp5_cfg->pipe_vig.base[2]);
mdp5_cfg          542 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_RGB0: return (mdp5_cfg->pipe_rgb.base[0]);
mdp5_cfg          543 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_RGB1: return (mdp5_cfg->pipe_rgb.base[1]);
mdp5_cfg          544 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_RGB2: return (mdp5_cfg->pipe_rgb.base[2]);
mdp5_cfg          545 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_DMA0: return (mdp5_cfg->pipe_dma.base[0]);
mdp5_cfg          546 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_DMA1: return (mdp5_cfg->pipe_dma.base[1]);
mdp5_cfg          547 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_VIG3: return (mdp5_cfg->pipe_vig.base[3]);
mdp5_cfg          548 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_RGB3: return (mdp5_cfg->pipe_rgb.base[3]);
mdp5_cfg          549 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_CURSOR0: return (mdp5_cfg->pipe_cursor.base[0]);
mdp5_cfg          550 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_CURSOR1: return (mdp5_cfg->pipe_cursor.base[1]);
mdp5_cfg         1066 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 0: return (mdp5_cfg->lm.base[0]);
mdp5_cfg         1067 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 1: return (mdp5_cfg->lm.base[1]);
mdp5_cfg         1068 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 2: return (mdp5_cfg->lm.base[2]);
mdp5_cfg         1069 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 3: return (mdp5_cfg->lm.base[3]);
mdp5_cfg         1070 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 4: return (mdp5_cfg->lm.base[4]);
mdp5_cfg         1071 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 5: return (mdp5_cfg->lm.base[5]);
mdp5_cfg         1261 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 0: return (mdp5_cfg->dspp.base[0]);
mdp5_cfg         1262 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 1: return (mdp5_cfg->dspp.base[1]);
mdp5_cfg         1263 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 2: return (mdp5_cfg->dspp.base[2]);
mdp5_cfg         1264 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 3: return (mdp5_cfg->dspp.base[3]);
mdp5_cfg         1306 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 0: return (mdp5_cfg->pp.base[0]);
mdp5_cfg         1307 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 1: return (mdp5_cfg->pp.base[1]);
mdp5_cfg         1308 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 2: return (mdp5_cfg->pp.base[2]);
mdp5_cfg         1309 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 3: return (mdp5_cfg->pp.base[3]);
mdp5_cfg         1395 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 0: return (mdp5_cfg->wb.base[0]);
mdp5_cfg         1396 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 1: return (mdp5_cfg->wb.base[1]);
mdp5_cfg         1397 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 2: return (mdp5_cfg->wb.base[2]);
mdp5_cfg         1398 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 3: return (mdp5_cfg->wb.base[3]);
mdp5_cfg         1399 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 4: return (mdp5_cfg->wb.base[4]);
mdp5_cfg         1746 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 0: return (mdp5_cfg->intf.base[0]);
mdp5_cfg         1747 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 1: return (mdp5_cfg->intf.base[1]);
mdp5_cfg         1748 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 2: return (mdp5_cfg->intf.base[2]);
mdp5_cfg         1749 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 3: return (mdp5_cfg->intf.base[3]);
mdp5_cfg         1750 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 4: return (mdp5_cfg->intf.base[4]);
mdp5_cfg         1892 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 0: return (mdp5_cfg->ad.base[0]);
mdp5_cfg         1893 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case 1: return (mdp5_cfg->ad.base[1]);
mdp5_cfg           11 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c 	struct mdp5_cfg config;
mdp5_cfg           15 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c const struct mdp5_cfg_hw *mdp5_cfg = NULL;
mdp5_cfg          762 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_handler)
mdp5_cfg          813 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c 		mdp5_cfg = cfg_handlers[i].config.hw;
mdp5_cfg          817 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c 	if (unlikely(!mdp5_cfg)) {
mdp5_cfg          825 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c 	cfg_handler->config.hw = mdp5_cfg;
mdp5_cfg          830 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c 	DBG("MDP5: %s hw config selected", mdp5_cfg->name);
mdp5_cfg           17 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h extern const struct mdp5_cfg_hw *mdp5_cfg;
mdp5_cfg          114 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_hnd);
mdp5_cfg          683 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	struct mdp5_cfg *config;
mdp5_cfg          934 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	struct mdp5_cfg *config;
mdp5_cfg          259 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 	struct mdp5_cfg *config = mdp5_cfg_get_config(get_kms(plane)->cfg);
mdp5_cfg           58 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c 	return mdp5_cfg->smp.clients[pipe] + plane;