mdp4_read 536 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c !(mdp4_read(mdp4_kms, REG_MDP4_OVERLAY_FLUSH) & mdp4_read 569 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel = mdp4_read(mdp4_kms, REG_MDP4_DISP_INTF_SEL); mdp4_read 76 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c enable = mdp4_read(mdp4_kms, REG_MDP4_INTR_ENABLE); mdp4_read 77 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c status = mdp4_read(mdp4_kms, REG_MDP4_INTR_STATUS) & enable; mdp4_read 29 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c version = mdp4_read(mdp4_kms, REG_MDP4_VERSION); mdp4_read 77 drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c while (!mdp4_read(mdp4_kms, REG_MDP4_LVDS_PHY_PLL_LOCKED))