mdp4_pipe         590 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE(enum mdp4_pipe i0) { return 0x00020000 + 0x10000*i0; }
mdp4_pipe         592 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRC_SIZE(enum mdp4_pipe i0) { return 0x00020000 + 0x10000*i0; }
mdp4_pipe         606 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRC_XY(enum mdp4_pipe i0) { return 0x00020004 + 0x10000*i0; }
mdp4_pipe         620 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_DST_SIZE(enum mdp4_pipe i0) { return 0x00020008 + 0x10000*i0; }
mdp4_pipe         634 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_DST_XY(enum mdp4_pipe i0) { return 0x0002000c + 0x10000*i0; }
mdp4_pipe         648 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRCP0_BASE(enum mdp4_pipe i0) { return 0x00020010 + 0x10000*i0; }
mdp4_pipe         650 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRCP1_BASE(enum mdp4_pipe i0) { return 0x00020014 + 0x10000*i0; }
mdp4_pipe         652 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRCP2_BASE(enum mdp4_pipe i0) { return 0x00020018 + 0x10000*i0; }
mdp4_pipe         654 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRCP3_BASE(enum mdp4_pipe i0) { return 0x0002001c + 0x10000*i0; }
mdp4_pipe         656 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRC_STRIDE_A(enum mdp4_pipe i0) { return 0x00020040 + 0x10000*i0; }
mdp4_pipe         670 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRC_STRIDE_B(enum mdp4_pipe i0) { return 0x00020044 + 0x10000*i0; }
mdp4_pipe         684 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SSTILE_FRAME_SIZE(enum mdp4_pipe i0) { return 0x00020048 + 0x10000*i0; }
mdp4_pipe         698 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRC_FORMAT(enum mdp4_pipe i0) { return 0x00020050 + 0x10000*i0; }
mdp4_pipe         759 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SRC_UNPACK(enum mdp4_pipe i0) { return 0x00020054 + 0x10000*i0; }
mdp4_pipe         785 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_OP_MODE(enum mdp4_pipe i0) { return 0x00020058 + 0x10000*i0; }
mdp4_pipe         810 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_PHASEX_STEP(enum mdp4_pipe i0) { return 0x0002005c + 0x10000*i0; }
mdp4_pipe         812 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_PHASEY_STEP(enum mdp4_pipe i0) { return 0x00020060 + 0x10000*i0; }
mdp4_pipe         814 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_FETCH_CONFIG(enum mdp4_pipe i0) { return 0x00021004 + 0x10000*i0; }
mdp4_pipe         816 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_SOLID_COLOR(enum mdp4_pipe i0) { return 0x00021008 + 0x10000*i0; }
mdp4_pipe         818 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC(enum mdp4_pipe i0) { return 0x00024000 + 0x10000*i0; }
mdp4_pipe         821 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_MV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024400 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         823 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_MV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024400 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         825 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_PRE_BV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024500 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         827 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_PRE_BV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024500 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         829 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_POST_BV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024580 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         831 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_POST_BV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024580 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         833 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_PRE_LV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024600 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         835 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_PRE_LV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024600 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         837 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_POST_LV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024680 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe         839 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_PIPE_CSC_POST_LV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024680 + 0x10000*i0 + 0x4*i1; }
mdp4_pipe          83 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane);
mdp4_pipe         166 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 			enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane);
mdp4_pipe         190 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane);
mdp4_pipe         343 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c 	static const enum mdp4_pipe rgb_planes[] = {
mdp4_pipe         346 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c 	static const enum mdp4_pipe vg_planes[] = {
mdp4_pipe          61 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h static inline uint32_t pipe2flush(enum mdp4_pipe pipe)
mdp4_pipe         102 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h 		enum mdp4_pipe pipe, enum mdp_mixer_stage_id stage)
mdp4_pipe         167 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h static inline uint32_t mdp4_pipe_caps(enum mdp4_pipe pipe)
mdp4_pipe         185 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane);
mdp4_pipe         187 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h 		enum mdp4_pipe pipe_id, bool private_plane);
mdp4_pipe          19 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c 	enum mdp4_pipe pipe;
mdp4_pipe         143 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c 	enum mdp4_pipe pipe = mdp4_plane->pipe;
mdp4_pipe         164 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c 		enum mdp4_pipe pipe, struct csc_cfg *csc)
mdp4_pipe         202 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c 	enum mdp4_pipe pipe = mdp4_plane->pipe;
mdp4_pipe         344 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
mdp4_pipe         352 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c 		enum mdp4_pipe pipe_id, bool private_plane)