mdp4_dtv_encoder 20 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c #define to_mdp4_dtv_encoder(x) container_of(x, struct mdp4_dtv_encoder, base) mdp4_dtv_encoder 31 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder) mdp4_dtv_encoder 33 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c struct drm_device *dev = mdp4_dtv_encoder->base.dev; mdp4_dtv_encoder 42 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->bsc = msm_bus_scale_register_client( mdp4_dtv_encoder 44 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c DBG("bus scale client: %08x", mdp4_dtv_encoder->bsc); mdp4_dtv_encoder 51 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder) mdp4_dtv_encoder 53 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (mdp4_dtv_encoder->bsc) { mdp4_dtv_encoder 54 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c msm_bus_scale_unregister_client(mdp4_dtv_encoder->bsc); mdp4_dtv_encoder 55 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->bsc = 0; mdp4_dtv_encoder 59 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx) mdp4_dtv_encoder 61 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (mdp4_dtv_encoder->bsc) { mdp4_dtv_encoder 63 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c msm_bus_scale_client_update_request(mdp4_dtv_encoder->bsc, idx); mdp4_dtv_encoder 67 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {} mdp4_dtv_encoder 68 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {} mdp4_dtv_encoder 69 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx) {} mdp4_dtv_encoder 74 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder); mdp4_dtv_encoder 75 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c bs_fini(mdp4_dtv_encoder); mdp4_dtv_encoder 77 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c kfree(mdp4_dtv_encoder); mdp4_dtv_encoder 88 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder); mdp4_dtv_encoder 98 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->pixclock = mode->clock * 1000; mdp4_dtv_encoder 100 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c DBG("pixclock=%lu", mdp4_dtv_encoder->pixclock); mdp4_dtv_encoder 144 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder); mdp4_dtv_encoder 147 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (WARN_ON(!mdp4_dtv_encoder->enabled)) mdp4_dtv_encoder 162 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c clk_disable_unprepare(mdp4_dtv_encoder->hdmi_clk); mdp4_dtv_encoder 163 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c clk_disable_unprepare(mdp4_dtv_encoder->mdp_clk); mdp4_dtv_encoder 165 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c bs_set(mdp4_dtv_encoder, 0); mdp4_dtv_encoder 167 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->enabled = false; mdp4_dtv_encoder 173 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder); mdp4_dtv_encoder 175 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c unsigned long pc = mdp4_dtv_encoder->pixclock; mdp4_dtv_encoder 178 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (WARN_ON(mdp4_dtv_encoder->enabled)) mdp4_dtv_encoder 188 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c bs_set(mdp4_dtv_encoder, 1); mdp4_dtv_encoder 192 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c ret = clk_set_rate(mdp4_dtv_encoder->mdp_clk, pc); mdp4_dtv_encoder 197 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c ret = clk_prepare_enable(mdp4_dtv_encoder->mdp_clk); mdp4_dtv_encoder 201 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c ret = clk_prepare_enable(mdp4_dtv_encoder->hdmi_clk); mdp4_dtv_encoder 207 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->enabled = true; mdp4_dtv_encoder 218 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder); mdp4_dtv_encoder 219 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c return clk_round_rate(mdp4_dtv_encoder->mdp_clk, rate); mdp4_dtv_encoder 226 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c struct mdp4_dtv_encoder *mdp4_dtv_encoder; mdp4_dtv_encoder 229 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder = kzalloc(sizeof(*mdp4_dtv_encoder), GFP_KERNEL); mdp4_dtv_encoder 230 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (!mdp4_dtv_encoder) { mdp4_dtv_encoder 235 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c encoder = &mdp4_dtv_encoder->base; mdp4_dtv_encoder 241 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->hdmi_clk = devm_clk_get(dev->dev, "hdmi_clk"); mdp4_dtv_encoder 242 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (IS_ERR(mdp4_dtv_encoder->hdmi_clk)) { mdp4_dtv_encoder 244 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c ret = PTR_ERR(mdp4_dtv_encoder->hdmi_clk); mdp4_dtv_encoder 248 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->mdp_clk = devm_clk_get(dev->dev, "tv_clk"); mdp4_dtv_encoder 249 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (IS_ERR(mdp4_dtv_encoder->mdp_clk)) { mdp4_dtv_encoder 251 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c ret = PTR_ERR(mdp4_dtv_encoder->mdp_clk); mdp4_dtv_encoder 255 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c bs_init(mdp4_dtv_encoder);