mdp4_crtc          59 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c #define to_mdp4_crtc(x) container_of(x, struct mdp4_crtc, base)
mdp4_crtc          69 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc          71 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	atomic_or(pending, &mdp4_crtc->pending);
mdp4_crtc          72 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp_irq_register(&get_kms(crtc)->base, &mdp4_crtc->vblank);
mdp4_crtc          77 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc          87 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	flush |= ovlp2flush(mdp4_crtc->ovlp);
mdp4_crtc          89 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	DBG("%s: flush=%08x", mdp4_crtc->name, flush);
mdp4_crtc          91 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->flushed_mask = flush;
mdp4_crtc          99 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         105 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	event = mdp4_crtc->event;
mdp4_crtc         107 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		mdp4_crtc->event = NULL;
mdp4_crtc         108 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		DBG("%s: send event: %p", mdp4_crtc->name, event);
mdp4_crtc         116 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc =
mdp4_crtc         117 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		container_of(work, struct mdp4_crtc, unref_cursor_work);
mdp4_crtc         118 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_kms *mdp4_kms = get_kms(&mdp4_crtc->base);
mdp4_crtc         127 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         130 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	drm_flip_work_cleanup(&mdp4_crtc->unref_cursor_work);
mdp4_crtc         132 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	kfree(mdp4_crtc);
mdp4_crtc         162 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         168 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 			mixer_cfg = mixercfg(mixer_cfg, mdp4_crtc->mixer,
mdp4_crtc         178 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         181 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	int i, ovlp = mdp4_crtc->ovlp;
mdp4_crtc         226 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         228 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	enum mdp4_dma dma = mdp4_crtc->dma;
mdp4_crtc         229 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	int ovlp = mdp4_crtc->ovlp;
mdp4_crtc         238 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 			mdp4_crtc->name, DRM_MODE_ARG(mode));
mdp4_crtc         269 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         272 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	DBG("%s", mdp4_crtc->name);
mdp4_crtc         274 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	if (WARN_ON(!mdp4_crtc->enabled))
mdp4_crtc         280 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp_irq_unregister(&mdp4_kms->base, &mdp4_crtc->err);
mdp4_crtc         283 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->enabled = false;
mdp4_crtc         289 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         292 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	DBG("%s", mdp4_crtc->name);
mdp4_crtc         294 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	if (WARN_ON(mdp4_crtc->enabled))
mdp4_crtc         302 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp_irq_register(&mdp4_kms->base, &mdp4_crtc->err);
mdp4_crtc         306 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->enabled = true;
mdp4_crtc         312 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         313 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	DBG("%s: check", mdp4_crtc->name);
mdp4_crtc         321 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         322 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	DBG("%s: begin", mdp4_crtc->name);
mdp4_crtc         328 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         332 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	DBG("%s: event: %p", mdp4_crtc->name, crtc->state->event);
mdp4_crtc         334 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	WARN_ON(mdp4_crtc->event);
mdp4_crtc         337 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->event = crtc->state->event;
mdp4_crtc         356 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         359 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	enum mdp4_dma dma = mdp4_crtc->dma;
mdp4_crtc         362 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	spin_lock_irqsave(&mdp4_crtc->cursor.lock, flags);
mdp4_crtc         363 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	if (mdp4_crtc->cursor.stale) {
mdp4_crtc         364 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		struct drm_gem_object *next_bo = mdp4_crtc->cursor.next_bo;
mdp4_crtc         365 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		struct drm_gem_object *prev_bo = mdp4_crtc->cursor.scanout_bo;
mdp4_crtc         366 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		uint64_t iova = mdp4_crtc->cursor.next_iova;
mdp4_crtc         375 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 					MDP4_DMA_CURSOR_SIZE_WIDTH(mdp4_crtc->cursor.width) |
mdp4_crtc         376 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 					MDP4_DMA_CURSOR_SIZE_HEIGHT(mdp4_crtc->cursor.height));
mdp4_crtc         389 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 			drm_flip_work_queue(&mdp4_crtc->unref_cursor_work, prev_bo);
mdp4_crtc         391 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		mdp4_crtc->cursor.scanout_bo = next_bo;
mdp4_crtc         392 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		mdp4_crtc->cursor.stale = false;
mdp4_crtc         396 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 			MDP4_DMA_CURSOR_POS_X(mdp4_crtc->cursor.x) |
mdp4_crtc         397 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 			MDP4_DMA_CURSOR_POS_Y(mdp4_crtc->cursor.y));
mdp4_crtc         399 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	spin_unlock_irqrestore(&mdp4_crtc->cursor.lock, flags);
mdp4_crtc         406 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         436 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	spin_lock_irqsave(&mdp4_crtc->cursor.lock, flags);
mdp4_crtc         437 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	old_bo = mdp4_crtc->cursor.next_bo;
mdp4_crtc         438 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->cursor.next_bo   = cursor_bo;
mdp4_crtc         439 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->cursor.next_iova = iova;
mdp4_crtc         440 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->cursor.width     = width;
mdp4_crtc         441 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->cursor.height    = height;
mdp4_crtc         442 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->cursor.stale     = true;
mdp4_crtc         443 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	spin_unlock_irqrestore(&mdp4_crtc->cursor.lock, flags);
mdp4_crtc         447 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		drm_flip_work_queue(&mdp4_crtc->unref_cursor_work, old_bo);
mdp4_crtc         461 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         464 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	spin_lock_irqsave(&mdp4_crtc->cursor.lock, flags);
mdp4_crtc         465 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->cursor.x = x;
mdp4_crtc         466 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->cursor.y = y;
mdp4_crtc         467 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	spin_unlock_irqrestore(&mdp4_crtc->cursor.lock, flags);
mdp4_crtc         497 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = container_of(irq, struct mdp4_crtc, vblank);
mdp4_crtc         498 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct drm_crtc *crtc = &mdp4_crtc->base;
mdp4_crtc         502 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp_irq_unregister(&get_kms(crtc)->base, &mdp4_crtc->vblank);
mdp4_crtc         504 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	pending = atomic_xchg(&mdp4_crtc->pending, 0);
mdp4_crtc         512 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		drm_flip_work_commit(&mdp4_crtc->unref_cursor_work, priv->wq);
mdp4_crtc         518 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = container_of(irq, struct mdp4_crtc, err);
mdp4_crtc         519 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct drm_crtc *crtc = &mdp4_crtc->base;
mdp4_crtc         520 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	DBG("%s: error: %08x", mdp4_crtc->name, irqstatus);
mdp4_crtc         527 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         537 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 			mdp4_crtc->flushed_mask),
mdp4_crtc         540 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 		dev_warn(dev->dev, "vblank time out, crtc=%d\n", mdp4_crtc->id);
mdp4_crtc         542 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->flushed_mask = 0;
mdp4_crtc         549 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         550 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	return mdp4_crtc->vblank.irqmask;
mdp4_crtc         556 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         559 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_write(mdp4_kms, REG_MDP4_DMA_CONFIG(mdp4_crtc->dma), config);
mdp4_crtc         565 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
mdp4_crtc         571 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	switch (mdp4_crtc->dma) {
mdp4_crtc         594 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->mixer = mixer;
mdp4_crtc         598 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	DBG("%s: intf_sel=%08x", mdp4_crtc->name, intf_sel);
mdp4_crtc         622 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct mdp4_crtc *mdp4_crtc;
mdp4_crtc         624 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc = kzalloc(sizeof(*mdp4_crtc), GFP_KERNEL);
mdp4_crtc         625 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	if (!mdp4_crtc)
mdp4_crtc         628 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	crtc = &mdp4_crtc->base;
mdp4_crtc         630 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->id = id;
mdp4_crtc         632 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->ovlp = ovlp_id;
mdp4_crtc         633 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->dma = dma_id;
mdp4_crtc         635 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->vblank.irqmask = dma2irq(mdp4_crtc->dma);
mdp4_crtc         636 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->vblank.irq = mdp4_crtc_vblank_irq;
mdp4_crtc         638 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->err.irqmask = dma2err(mdp4_crtc->dma);
mdp4_crtc         639 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	mdp4_crtc->err.irq = mdp4_crtc_err_irq;
mdp4_crtc         641 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	snprintf(mdp4_crtc->name, sizeof(mdp4_crtc->name), "%s:%d",
mdp4_crtc         644 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	spin_lock_init(&mdp4_crtc->cursor.lock);
mdp4_crtc         646 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	drm_flip_work_init(&mdp4_crtc->unref_cursor_work,