MEM_PWR_SEL_CTRL 1188 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1192 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1058 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1062 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1763 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1767 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 5630 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 5634 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 6268 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 6272 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 6848 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 6852 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 6798 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 6802 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1188 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1192 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1058 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1062 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1454 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1458 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1487 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1491 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1236 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1240 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1272 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1276 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1058 drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1062 drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1201 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1205 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1071 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1075 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 9547 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 9551 drivers/gpu/drm/amd/include/navi10_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL  212 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL  216 drivers/gpu/drm/amd/include/vega10_enum.h } MEM_PWR_SEL_CTRL;
MEM_PWR_SEL_CTRL 1058 sound/soc/amd/include/acp_2_2_enum.h typedef enum MEM_PWR_SEL_CTRL {
MEM_PWR_SEL_CTRL 1062 sound/soc/amd/include/acp_2_2_enum.h } MEM_PWR_SEL_CTRL;