MDM_ENC_PIPE_BUSY__MIF_WR_GEN0_BUSY_MASK 3444 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define MDM_ENC_PIPE_BUSY__MIF_WR_GEN0_BUSY_MASK 0x00040000L MDM_ENC_PIPE_BUSY__MIF_WR_GEN0_BUSY_MASK 3520 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define MDM_ENC_PIPE_BUSY__MIF_WR_GEN0_BUSY_MASK 0x00040000L