MDM_ENC_PIPE_BUSY__MIF_WR_BSP0_BUSY__SHIFT 3421 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define MDM_ENC_PIPE_BUSY__MIF_WR_BSP0_BUSY__SHIFT                                                            0x16
MDM_ENC_PIPE_BUSY__MIF_WR_BSP0_BUSY__SHIFT 3497 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define MDM_ENC_PIPE_BUSY__MIF_WR_BSP0_BUSY__SHIFT                                                            0x16