MDIO_START 223 drivers/net/ethernet/atheros/atl1e/atl1e_hw.h #define MDIO_START 0x800000 /* Write 1 to initiate the MDIO master. And this bit is self cleared after one cycle*/ MDIO_START 163 drivers/net/ethernet/atheros/atlx/atlx.h #define MDIO_START 0x800000 MDIO_START 47 drivers/net/ethernet/hisilicon/hix5hd2_gmac.c #define MDIO_START BIT(20) MDIO_START 26 drivers/net/ethernet/qualcomm/emac/emac-phy.c #define MDIO_START BIT(23)