MDIO_DATA_MASK    217 drivers/net/ethernet/atheros/atl1e/atl1e_hw.h #define     MDIO_DATA_MASK          0xffff  /* On MDIO write, the 16-bit control data to write to PHY MII management register */
MDIO_DATA_MASK    157 drivers/net/ethernet/atheros/atlx/atlx.h #define MDIO_DATA_MASK			0xFFFF
MDIO_DATA_MASK    236 drivers/net/ethernet/sgi/meth.h #define MDIO_DATA_MASK 0xFFFF