MC_WR_GRP_EXT__TC0_MASK 10010 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_WR_GRP_EXT__TC0_MASK 0x000000f0L
MC_WR_GRP_EXT__TC0_MASK 1133 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_WR_GRP_EXT__TC0_MASK 0xf0
MC_WR_GRP_EXT__TC0_MASK 1201 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_WR_GRP_EXT__TC0_MASK 0xf0
MC_WR_GRP_EXT__TC0_MASK 1385 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_WR_GRP_EXT__TC0_MASK 0xf0
MC_WR_GRP_EXT__TC0_MASK 1379 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_WR_GRP_EXT__TC0_MASK 0xf0