MC_SEQ_WR_CTL_D1__OEN_EXT__SHIFT 9601 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_WR_CTL_D1__OEN_EXT__SHIFT 0x00000010
MC_SEQ_WR_CTL_D1__OEN_EXT__SHIFT 6592 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_WR_CTL_D1__OEN_EXT__SHIFT 0x10
MC_SEQ_WR_CTL_D1__OEN_EXT__SHIFT 7506 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_WR_CTL_D1__OEN_EXT__SHIFT 0x10