MC_SEQ_WR_CTL_D0__ODT_EXT__SHIFT 9545 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_WR_CTL_D0__ODT_EXT__SHIFT 0x0000001c
MC_SEQ_WR_CTL_D0__ODT_EXT__SHIFT 6572 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_WR_CTL_D0__ODT_EXT__SHIFT 0x1c
MC_SEQ_WR_CTL_D0__ODT_EXT__SHIFT 7486 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_WR_CTL_D0__ODT_EXT__SHIFT 0x1c