MC_SEQ_WCDR_CTRL__TRAIN_EN_MASK 9462 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_WCDR_CTRL__TRAIN_EN_MASK 0x00008000L
MC_SEQ_WCDR_CTRL__TRAIN_EN_MASK 6823 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_WCDR_CTRL__TRAIN_EN_MASK 0x8000
MC_SEQ_WCDR_CTRL__TRAIN_EN_MASK 7737 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_WCDR_CTRL__TRAIN_EN_MASK 0x8000