MC_SEQ_WCDR_CTRL__AREF_EN_MASK 9450 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_WCDR_CTRL__AREF_EN_MASK 0x00004000L
MC_SEQ_WCDR_CTRL__AREF_EN_MASK 6821 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_WCDR_CTRL__AREF_EN_MASK 0x4000
MC_SEQ_WCDR_CTRL__AREF_EN_MASK 7735 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_WCDR_CTRL__AREF_EN_MASK 0x4000