MC_SEQ_TSM_UPDATE__AREF_COUNT__SHIFT 9243 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_TSM_UPDATE__AREF_COUNT__SHIFT 0x00000010
MC_SEQ_TSM_UPDATE__AREF_COUNT__SHIFT 9272 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_TSM_UPDATE__AREF_COUNT__SHIFT 0x10
MC_SEQ_TSM_UPDATE__AREF_COUNT__SHIFT 10184 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_TSM_UPDATE__AREF_COUNT__SHIFT 0x10