MC_SEQ_TSM_MISC__CH1_WCDR_OFFSET_MASK 9287 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_TSM_MISC__CH1_WCDR_OFFSET_MASK 0xfc000000
MC_SEQ_TSM_MISC__CH1_WCDR_OFFSET_MASK 10199 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_TSM_MISC__CH1_WCDR_OFFSET_MASK 0xfc000000