MC_SEQ_TSM_GCNT__COMP_VALUE_MASK 9210 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_TSM_GCNT__COMP_VALUE_MASK 0xffff0000L
MC_SEQ_TSM_GCNT__COMP_VALUE_MASK 9223 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_TSM_GCNT__COMP_VALUE_MASK 0xffff0000
MC_SEQ_TSM_GCNT__COMP_VALUE_MASK 10135 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_TSM_GCNT__COMP_VALUE_MASK 0xffff0000