MC_SEQ_TSM_CTRL__MASK_BITS_MASK 9180 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_TSM_CTRL__MASK_BITS_MASK 0x00000080L
MC_SEQ_TSM_CTRL__MASK_BITS_MASK 9203 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_TSM_CTRL__MASK_BITS_MASK 0x80
MC_SEQ_TSM_CTRL__MASK_BITS_MASK 10115 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_TSM_CTRL__MASK_BITS_MASK 0x80