MC_SEQ_TRAIN_EDC_THRESHOLD3__CLEAR_RETRAIN_STATUS_MASK 8922 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_TRAIN_EDC_THRESHOLD3__CLEAR_RETRAIN_STATUS_MASK 0x00000004L
MC_SEQ_TRAIN_EDC_THRESHOLD3__CLEAR_RETRAIN_STATUS_MASK 6907 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_TRAIN_EDC_THRESHOLD3__CLEAR_RETRAIN_STATUS_MASK 0x4
MC_SEQ_TRAIN_EDC_THRESHOLD3__CLEAR_RETRAIN_STATUS_MASK 7821 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_TRAIN_EDC_THRESHOLD3__CLEAR_RETRAIN_STATUS_MASK 0x4