MC_SEQ_TCG_CNTL__LOAD_FIFO_MASK 8840 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_TCG_CNTL__LOAD_FIFO_MASK 0x00010000L
MC_SEQ_TCG_CNTL__LOAD_FIFO_MASK 9165 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_TCG_CNTL__LOAD_FIFO_MASK 0x10000
MC_SEQ_TCG_CNTL__LOAD_FIFO_MASK 10077 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_TCG_CNTL__LOAD_FIFO_MASK 0x10000