MC_SEQ_SUP_IR_STAT__STATUS_MASK 8812 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_SUP_IR_STAT__STATUS_MASK 0xffffffffL
MC_SEQ_SUP_IR_STAT__STATUS_MASK 8733 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_SUP_IR_STAT__STATUS_MASK 0xffffffff
MC_SEQ_SUP_IR_STAT__STATUS_MASK 9645 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_SUP_IR_STAT__STATUS_MASK 0xffffffff