MC_SEQ_SUP_CNTL__PGM_WRITE_MASK 8792 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_SUP_CNTL__PGM_WRITE_MASK 0x00000010L
MC_SEQ_SUP_CNTL__PGM_WRITE_MASK 8713 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_SUP_CNTL__PGM_WRITE_MASK 0x10
MC_SEQ_SUP_CNTL__PGM_WRITE_MASK 9625 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_SUP_CNTL__PGM_WRITE_MASK 0x10