MC_SEQ_STATUS_M__SLF_D0__SHIFT 8765 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_STATUS_M__SLF_D0__SHIFT 0x00000004
MC_SEQ_STATUS_M__SLF_D0__SHIFT 8632 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_STATUS_M__SLF_D0__SHIFT 0x4
MC_SEQ_STATUS_M__SLF_D0__SHIFT 9546 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_STATUS_M__SLF_D0__SHIFT 0x4