MC_SEQ_STATUS_M__PMG_FSMSTATE_MASK 8740 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_STATUS_M__PMG_FSMSTATE_MASK 0x01f00000L
MC_SEQ_STATUS_M__PMG_FSMSTATE_MASK 8653 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_STATUS_M__PMG_FSMSTATE_MASK 0x1f00000
MC_SEQ_STATUS_M__PMG_FSMSTATE_MASK 9567 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_STATUS_M__PMG_FSMSTATE_MASK 0x1f00000