MC_SEQ_RD_CTL_D1__RST_HLD__SHIFT 8545 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_RD_CTL_D1__RST_HLD__SHIFT 0x0000000c
MC_SEQ_RD_CTL_D1__RST_HLD__SHIFT 6542 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_RD_CTL_D1__RST_HLD__SHIFT 0xc
MC_SEQ_RD_CTL_D1__RST_HLD__SHIFT 7456 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_RD_CTL_D1__RST_HLD__SHIFT 0xc