MC_SEQ_RD_CTL_D1__RST_HLD_MASK 8544 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_RD_CTL_D1__RST_HLD_MASK 0x0000f000L
MC_SEQ_RD_CTL_D1__RST_HLD_MASK 6541 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_RD_CTL_D1__RST_HLD_MASK 0xf000
MC_SEQ_RD_CTL_D1__RST_HLD_MASK 7455 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_RD_CTL_D1__RST_HLD_MASK 0xf000