MC_SEQ_RD_CTL_D1_LP__RXDPWRON_DLY__SHIFT 8531 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_RD_CTL_D1_LP__RXDPWRON_DLY__SHIFT 0x0000000a
MC_SEQ_RD_CTL_D1_LP__RXDPWRON_DLY__SHIFT 8982 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_RD_CTL_D1_LP__RXDPWRON_DLY__SHIFT 0xa
MC_SEQ_RD_CTL_D1_LP__RXDPWRON_DLY__SHIFT 9894 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_RD_CTL_D1_LP__RXDPWRON_DLY__SHIFT 0xa