MC_SEQ_PMG_PG_SWCNTL_0__PMD1_DQ_RX_ENB_MASK 8382 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_PMG_PG_SWCNTL_0__PMD1_DQ_RX_ENB_MASK 0x00001000L
MC_SEQ_PMG_PG_SWCNTL_0__PMD1_DQ_RX_ENB_MASK 9695 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_PMG_PG_SWCNTL_0__PMD1_DQ_RX_ENB_MASK 0x1000
MC_SEQ_PMG_PG_SWCNTL_0__PMD1_DQ_RX_ENB_MASK 10609 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_PMG_PG_SWCNTL_0__PMD1_DQ_RX_ENB_MASK 0x1000