MC_SEQ_PMG_PG_SWCNTL_0__PMD0_EDC_RX_ENB_MASK 8370 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_PMG_PG_SWCNTL_0__PMD0_EDC_RX_ENB_MASK 0x00000040L MC_SEQ_PMG_PG_SWCNTL_0__PMD0_EDC_RX_ENB_MASK 9683 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_PMG_PG_SWCNTL_0__PMD0_EDC_RX_ENB_MASK 0x40 MC_SEQ_PMG_PG_SWCNTL_0__PMD0_EDC_RX_ENB_MASK 10597 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_PMG_PG_SWCNTL_0__PMD0_EDC_RX_ENB_MASK 0x40