MC_SEQ_PMG_DVS_CTL__TDVS_MASK 14005 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_PMG_DVS_CTL__TDVS_MASK 0x3e
MC_SEQ_PMG_DVS_CTL__TDVS_MASK 14919 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_PMG_DVS_CTL__TDVS_MASK 0x3e