MC_SEQ_PMG_DVS_CTL_LP__ENABLE_MASK 14007 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_PMG_DVS_CTL_LP__ENABLE_MASK 0x1
MC_SEQ_PMG_DVS_CTL_LP__ENABLE_MASK 14921 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_PMG_DVS_CTL_LP__ENABLE_MASK 0x1