MC_SEQ_PMG_DVS_CMD_LP__ADR_MSB0__SHIFT 14038 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_PMG_DVS_CMD_LP__ADR_MSB0__SHIFT 0x18
MC_SEQ_PMG_DVS_CMD_LP__ADR_MSB0__SHIFT 14952 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_PMG_DVS_CMD_LP__ADR_MSB0__SHIFT 0x18