MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB__SHIFT 8245 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB__SHIFT 0x0000000e
MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB__SHIFT 8588 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB__SHIFT 0xe
MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB__SHIFT 9502 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB__SHIFT 0xe