MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB_MASK 8244 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB_MASK 0x00004000L
MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB_MASK 8587 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB_MASK 0x4000
MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB_MASK 9501 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_PERF_CNTL_1__SEL_CH1_C_MSB_MASK 0x4000