MC_SEQ_FIFO_CTL__W_LD_INIT_D1__SHIFT 8111 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_FIFO_CTL__W_LD_INIT_D1__SHIFT 0x0000000a
MC_SEQ_FIFO_CTL__W_LD_INIT_D1__SHIFT 7876 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_FIFO_CTL__W_LD_INIT_D1__SHIFT 0xa
MC_SEQ_FIFO_CTL__W_LD_INIT_D1__SHIFT 8790 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_FIFO_CTL__W_LD_INIT_D1__SHIFT 0xa