MC_SEQ_FIFO_CTL__W_DSYC_EXT_MASK 8106 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_FIFO_CTL__W_DSYC_EXT_MASK 0x000c0000L
MC_SEQ_FIFO_CTL__W_DSYC_EXT_MASK 7881 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_FIFO_CTL__W_DSYC_EXT_MASK 0xc0000
MC_SEQ_FIFO_CTL__W_DSYC_EXT_MASK 8795 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_FIFO_CTL__W_DSYC_EXT_MASK 0xc0000