MC_SEQ_FIFO_CTL__R_LD_INIT__SHIFT 8099 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_FIFO_CTL__R_LD_INIT__SHIFT 0x00000004
MC_SEQ_FIFO_CTL__R_LD_INIT__SHIFT 7868 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_FIFO_CTL__R_LD_INIT__SHIFT 0x4
MC_SEQ_FIFO_CTL__R_LD_INIT__SHIFT 8782 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_FIFO_CTL__R_LD_INIT__SHIFT 0x4