MC_SEQ_FIFO_CTL__R_LD_INIT_MASK 8098 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_FIFO_CTL__R_LD_INIT_MASK 0x00000030L
MC_SEQ_FIFO_CTL__R_LD_INIT_MASK 7867 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_FIFO_CTL__R_LD_INIT_MASK 0x30
MC_SEQ_FIFO_CTL__R_LD_INIT_MASK 8781 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_FIFO_CTL__R_LD_INIT_MASK 0x30