MC_SEQ_CNTL_3__REPCG_EN_D1_MASK 13915 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_CNTL_3__REPCG_EN_D1_MASK 0x2000
MC_SEQ_CNTL_3__REPCG_EN_D1_MASK 14829 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_CNTL_3__REPCG_EN_D1_MASK 0x2000