MC_SEQ_CNTL_3__REPCG_EN_D0_MASK 13913 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_CNTL_3__REPCG_EN_D0_MASK 0x1000
MC_SEQ_CNTL_3__REPCG_EN_D0_MASK 14827 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_CNTL_3__REPCG_EN_D0_MASK 0x1000