MC_SEQ_CNTL_3__DQS_FRC_PAT__SHIFT 13928 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_CNTL_3__DQS_FRC_PAT__SHIFT 0x18
MC_SEQ_CNTL_3__DQS_FRC_PAT__SHIFT 14842 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_CNTL_3__DQS_FRC_PAT__SHIFT 0x18