MC_SEQ_CNTL_2__PLL_RX_PWRON_D1__SHIFT 7963 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_CNTL_2__PLL_RX_PWRON_D1__SHIFT 0x0000001c
MC_SEQ_CNTL_2__PLL_RX_PWRON_D1__SHIFT 6358 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_CNTL_2__PLL_RX_PWRON_D1__SHIFT 0x1c
MC_SEQ_CNTL_2__PLL_RX_PWRON_D1__SHIFT 7272 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_CNTL_2__PLL_RX_PWRON_D1__SHIFT 0x1c