MC_SEQ_CNTL_2__DRST_PU__SHIFT 6342 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_CNTL_2__DRST_PU__SHIFT 0x4
MC_SEQ_CNTL_2__DRST_PU__SHIFT 7256 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_CNTL_2__DRST_PU__SHIFT 0x4