MC_SEQ_BIT_REMAP_B3_D0__BIT4__SHIFT 7863 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT4__SHIFT 0x0000000c
MC_SEQ_BIT_REMAP_B3_D0__BIT4__SHIFT 8836 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT4__SHIFT 0xc
MC_SEQ_BIT_REMAP_B3_D0__BIT4__SHIFT 9748 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT4__SHIFT 0xc