MC_SEQ_BIT_REMAP_B3_D0__BIT1__SHIFT 7857 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT1__SHIFT 0x00000003
MC_SEQ_BIT_REMAP_B3_D0__BIT1__SHIFT 8830 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT1__SHIFT 0x3
MC_SEQ_BIT_REMAP_B3_D0__BIT1__SHIFT 9742 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT1__SHIFT 0x3