MC_SEQ_BIT_REMAP_B3_D0__BIT0__SHIFT 7855 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT0__SHIFT 0x00000000
MC_SEQ_BIT_REMAP_B3_D0__BIT0__SHIFT 8828 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT0__SHIFT 0x0
MC_SEQ_BIT_REMAP_B3_D0__BIT0__SHIFT 9740 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B3_D0__BIT0__SHIFT 0x0