MC_SEQ_BIT_REMAP_B2_D1__BIT5_MASK 7848 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_BIT_REMAP_B2_D1__BIT5_MASK 0x00038000L
MC_SEQ_BIT_REMAP_B2_D1__BIT5_MASK 8885 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B2_D1__BIT5_MASK 0x38000
MC_SEQ_BIT_REMAP_B2_D1__BIT5_MASK 9797 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B2_D1__BIT5_MASK 0x38000