MC_SEQ_BIT_REMAP_B1_D0__BIT3__SHIFT 7797 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_BIT_REMAP_B1_D0__BIT3__SHIFT 0x00000009
MC_SEQ_BIT_REMAP_B1_D0__BIT3__SHIFT 8802 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B1_D0__BIT3__SHIFT 0x9
MC_SEQ_BIT_REMAP_B1_D0__BIT3__SHIFT 9714 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B1_D0__BIT3__SHIFT 0x9