MC_SEQ_BIT_REMAP_B0_D0__BIT5_MASK 7768 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_SEQ_BIT_REMAP_B0_D0__BIT5_MASK 0x00038000L
MC_SEQ_BIT_REMAP_B0_D0__BIT5_MASK 8789 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B0_D0__BIT5_MASK 0x38000
MC_SEQ_BIT_REMAP_B0_D0__BIT5_MASK 9701 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_SEQ_BIT_REMAP_B0_D0__BIT5_MASK 0x38000